Changes between Version 30 and Version 31 of GcnInstrsVop1


Ignore:
Timestamp:
Jun 17, 2017, 12:00:27 PM (2 years ago)
Author:
trac
Comment:

--

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  • GcnInstrsVop1

    v30 v31  
    10851085Operation:<br />
    10861086<code>VDST = REVBIT(SRC0)</code></p>
     1087<h4>V_CEIL_F16</h4>
     1088<p>Opcode VOP1: 69 (0x45) for GCN 1.2<br />
     1089Opcode VOP3A: 389 (0x185) for GCN 1.2<br />
     1090Syntax: V_CEIL_F16 VDST, SRC0<br />
     1091Description: Truncate half floating point valu from SRC0 with rounding to positive infinity
     1092(ceilling), and store result to VDST. Implemented by flooring.
     1093If SRC0 is infinity or NaN then copy SRC0 to VDST.<br />
     1094Operation:<br />
     1095<code>HALF F = FLOOR(ASHALF(SRC0))
     1096if (ASHALF(SRC0) &gt; 0.0 &amp;&amp; ASHALF(SRC0) != F)
     1097    F += 1.0
     1098VDST = F</code></p>
    10871099<h4>V_CEIL_F32</h4>
    10881100<p>Opcode VOP1: 34 (0x22) for GCN 1.0/1.1; 29 (0x1d) for GCN 1.2<br />
     
    11141126Syntax: V_CLREXCP<br />
    11151127Description: Clear wave's exception state in SIMD.  </p>
     1128<h4>V_COS_F16</h4>
     1129<p>Opcode VOP1: 74 (0x4a) for GCN 1.2<br />
     1130Opcode VOP3A: 394 (0x18a) for GCN 1.2<br />
     1131Syntax: V_COS_F16 VDST, SRC0<br />
     1132Description: Compute cosine of half FP value from SRC0.
     1133Input value must be normalized to range 1.0 - 1.0 (-360 degree : 360 degree).
     1134If SRC0 value is out of range then store 1.0 to VDST.
     1135If SRC0 value is infinity, store -NAN to VDST.<br />
     1136Operation:<br />
     1137<code>FLOAT SF = ASHALF(SRC0)
     1138VDST = 1.0
     1139if (SF &gt;= -1.0 &amp;&amp; SF &lt;= 1.0)
     1140    VDST = APPROX_COS(SF)
     1141else if (ABS(SF)==INF_H)
     1142    VDST = -NAN_H
     1143else if (ISNAN(SF))
     1144    VDST = SRC0</code></p>
    11161145<h4>V_COS_F32</h4>
    11171146<p>Opcode VOP1: 54 (0x36) for GCN 1.0/1.1; 42 (0x2a) for GCN 1.2<br />
     
    14111440    if ((1U&lt;&lt;i) &amp; SRC0) != 0)
    14121441    { VDST = i; break; }</code></p>
     1442<h4>V_FLOOR_F16</h4>
     1443<p>Opcode VOP1: 68 (0x44) for GCN 1.2<br />
     1444Opcode VOP3A: 388 (0x184) for GCN 1.2<br />
     1445Syntax: V_FLOOR_F16 VDST, SRC0<br />
     1446Description: Truncate half floating point value SRC0 with rounding to negative infinity
     1447(flooring), and store result to VDST. If SRC0 is infinity or NaN then copy SRC0 to VDST.<br />
     1448Operation:<br />
     1449<code>VDST = FLOOR(ASHALF(SRC0))</code></p>
    14131450<h4>V_FLOOR_F32</h4>
    14141451<p>Opcode VOP1: 36 (0x24) for GCN 1.0/1.1; 31 (0x1f) for GCN 1.2<br />
    14151452Opcode VOP3A: 420 (0x1a4) for GCN 1.0/1.1; 351 (0x15f) for GCN 1.2<br />
    14161453Syntax: V_FLOOR_F32 VDST, SRC0<br />
    1417 Description: Truncate floating point value SRC0 with rounding to positive infinity
     1454Description: Truncate floating point value SRC0 with rounding to negative infinity
    14181455(flooring), and store result to VDST. If SRC0 is infinity or NaN then copy SRC0 to VDST.<br />
    14191456Operation:<br />
     
    14231460Opcode VOP3A: 410 (0x19a) for GCN 1.1; 346 (0x15a) for GCN 1.2<br />
    14241461Syntax: V_FLOOR_F64 VDST(2), SRC0(2)<br />
    1425 Description: Truncate double floating point value SRC0 with rounding to positive infinity
     1462Description: Truncate double floating point value SRC0 with rounding to negative infinity
    14261463(flooring), and store result to VDST. If SRC0 is infinity or NaN then copy SRC0 to VDST.<br />
    14271464Operation:<br />
     
    17331770    { firstlane = i; break; }
    17341771SDST = VSRC0[firstlane]</code></p>
     1772<h4>V_RNDNE_F16</h4>
     1773<p>Opcode VOP1: 71 (0x47) for GCN 1.2<br />
     1774Opcode VOP3A: 391 (0x187) for GCN 1.2<br />
     1775Syntax: V_RNDNE_F16 VDST, SRC0<br />
     1776Description: Round half floating point value SRC0 to nearest even integer,
     1777and store result to VDST. If SRC0 is infinity or NaN then copy SRC0 to VDST.<br />
     1778Operation:<br />
     1779<code>VDST = RNDNE(ASHALF(SRC0))</code></p>
    17351780<h4>V_RNDNE_F32</h4>
    17361781<p>Opcode VOP1: 35 (0x23) for GCN 1.0/1.1; 30 (0x1e) for GCN 1.2<br />
     
    18101855if (ASFLOAT(VDST)==INF)
    18111856    VDST = 0.0</code></p>
     1857<h4>V_SIN_F16</h4>
     1858<p>Opcode VOP1: 73 (0x49) for GCN 1.2<br />
     1859Opcode VOP3A: 393 (0x189) for GCN 1.2<br />
     1860Syntax: V_SIN_F16 VDST, SRC0<br />
     1861Description: Compute sine of half FP value from SRC0. Input value must be
     1862normalized to range 1.0 - 1.0 (-360 degree : 360 degree).
     1863If SRC0 value is out of range then store 0.0 to VDST.
     1864If SRC0 value is infinity, store -NAN to VDST.<br />
     1865Operation:<br />
     1866<code>HALF SF = ASHALF(SRC0)
     1867VDST = 0.0
     1868if (SF &gt;= -1.0 &amp;&amp; SF &lt;= 1.0)
     1869    VDST = APPROX_SIN(SF)
     1870else if (ABS(SF)==INF_H)
     1871    VDST = -NAN_H
     1872else if (ISNAN(SF))
     1873    VDST = SRC0</code></p>
    18121874<h4>V_SIN_F32</h4>
    18131875<p>Opcode VOP1: 53 (0x35) for GCN 1.0/1.1; 41 (0x29) for GCN 1.2<br />
     
    18601922else
    18611923    VDST = -NAN</code></p>
     1924<h4>V_TRUNC_F16</h4>
     1925<p>Opcode VOP1: 70 (0x46) for GCN 1.2<br />
     1926Opcode VOP3A: 390 (0x186) for GCN 1.2<br />
     1927Syntax: V_TRUNC_F16 VDST, SRC0<br />
     1928Description: Get integer value from half floating point value SRC0, and store (as half)
     1929it to VDST. If SRC0 is infinity or NaN then copy SRC0 to VDST.<br />
     1930Operation:<br />
     1931<code>VDST = RNDTZ(ASHALF(SRC0))</code></p>
    18621932<h4>V_TRUNC_F32</h4>
    18631933<p>Opcode VOP1: 33 (0x21) for GCN 1.0/1.1; 28 (0x1c) for GCN 1.2<br />