Changes between Version 39 and Version 40 of GcnInstrsVop1
- Timestamp:
- 12/29/17 08:00:29 (6 years ago)
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GcnInstrsVop1
v39 v40 1233 1233 Opcode VOP3A: 389 (0x185) for GCN 1.2<br /> 1234 1234 Syntax: V_CEIL_F16 VDST, SRC0<br /> 1235 Description: Truncate half floating point valu from SRC0 with rounding to positive infinity1235 Description: Truncate half floating point value from SRC0 with rounding to positive infinity 1236 1236 (ceilling), and store result to VDST. Implemented by flooring. 1237 1237 If SRC0 is infinity or NaN then copy SRC0 to VDST.<br /> … … 1245 1245 Opcode VOP3A: 418 (0x1a2) for GCN 1.0/1.1; 349 (0x15d) for GCN 1.2<br /> 1246 1246 Syntax: V_CEIL_F32 VDST, SRC0<br /> 1247 Description: Truncate floating point valu from SRC0 with rounding to positive infinity1247 Description: Truncate floating point value from SRC0 with rounding to positive infinity 1248 1248 (ceilling), and store result to VDST. Implemented by flooring. 1249 1249 If SRC0 is infinity or NaN then copy SRC0 to VDST.<br /> … … 1257 1257 Opcode VOP3A: 408 (0x198) for GCN 1.1; 344 (0x158) for GCN 1.2<br /> 1258 1258 Syntax: V_CEIL_F64 VDST(2), SRC0(2)<br /> 1259 Description: Truncate double floating point valu from SRC0 with rounding to1259 Description: Truncate double floating point value from SRC0 with rounding to 1260 1260 positive infinity (ceilling), and store result to VDST. Implemented by flooring. 1261 1261 If SRC0 is infinity or NaN then copy SRC0 to VDST.<br /> … … 1742 1742 Opcode VOP3A: 422 (0x1a6) for GCN 1.0/1.1<br /> 1743 1743 Syntax: V_LOG_CLAMP_F32 VDST, SRC0<br /> 1744 Description: Approximate logarithm of base 2 from floating point value SRC0 with1744 Description: Approximate logarithm of the base 2 from floating point value SRC0 with 1745 1745 clamping infinities to -MAX_FLOAT. Result is stored in VDST. 1746 1746 If SRC0 is negative then store -NaN to VDST. This instruction doesn't handle denormalized … … 1762 1762 Opcode VOP3A: 384 (0x180) for GCN 1.2<br /> 1763 1763 Syntax: V_LOG_F16 VDST, SRC0<br /> 1764 Description: Approximate logarithm of base 2 from half floating point value SRC0, and store1765 result to VDST. If SRC0 is negative then store -NaN to VDST.<br />1764 Description: Approximate logarithm of the base 2 from half floating point value SRC0, 1765 and store result to VDST. If SRC0 is negative then store -NaN to VDST.<br /> 1766 1766 Operation:<br /> 1767 1767 <code>HALF F = ASHALF(SRC0) … … 1776 1776 Opcode VOP3A: 423 (0x1a7) for GCN 1.0/1.1; 353 (0x161) for GCN 1.2<br /> 1777 1777 Syntax: V_LOG_F32 VDST, SRC0<br /> 1778 Description: Approximate logarithm of base 2 from floating point value SRC0, and store1778 Description: Approximate logarithm of base the 2 from floating point value SRC0, and store 1779 1779 result to VDST. If SRC0 is negative then store -NaN to VDST. 1780 1780 This instruction doesn't handle denormalized values regardless FLOAT MODE register setup.<br /> … … 1791 1791 Opcode VOP3A: 453 (0x1c5) for GCN 1.1; 396 (0x18c) for GCN 1.2<br /> 1792 1792 Syntax: V_LOG_LEGACY_F32 VDST, SRC0<br /> 1793 Description: Approximate logarithm of base 2 from floating point value SRC0, and store1793 Description: Approximate logarithm of the base 2 from floating point value SRC0, and store 1794 1794 result to VDST. If SRC0 is negative then store -NaN to VDST. 1795 1795 This instruction doesn't handle denormalized values regardless FLOAT MODE register setup.