Changes between Version 4 and Version 5 of GcnInstrsVop1


Ignore:
Timestamp:
Nov 28, 2015, 12:00:20 AM (4 years ago)
Author:
trac
Comment:

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  • GcnInstrsVop1

    v4 v5  
    11011101Description: Convert unsigned 32-bit integer to single FP value, and store it to VDST.<br />
    11021102Operation:<br />
    1103 ```
    1104 VDST = (FLOAT)SRC0</p>
     1103<code>VDST = (FLOAT)SRC0</code></p>
    11051104<h4>V_CVT_F64_I32</h4>
    11061105<p>Opcode VOP2: 4 (0x4)<br />
     
    11101109Operation:<br />
    11111110<code>VDST = (DOUBLE)(INT32)SRC0</code></p>
     1111<h4>V_CVT_FLR_I32_F32</h4>
     1112<p>Opcode VOP2: 13 (0xd)<br />
     1113Opcode VOP3A: 397 (0x18d) for GCN 1.0/1.1; 333 (0x14d) for GCN 1.2<br />
     1114Syntax: V_CVT_FLR_I32_F32 VDST, SRC0<br />
     1115Description: Convert 32-bit floating point value from SRC0 to signed 32-bit integer, and
     1116store result to VDST. Conversion uses rounding to negative infinity (floor).
     1117If value is higher/lower than maximal/minimal integer then store MAX_INT32/MIN_INT32 to VDST.
     1118If input value is NaN/-NaN then store MAX_INT32/MIN_INT32 to VDST.<br />
     1119Operation:<br />
     1120<code>if (ABS(SRC0)!=NAN)
     1121    VDST = (INT32)MAX(MIN(FLOOR(ASFLOAT(SRC0)), 2147483647.0), -2147483648.0)
     1122else
     1123    VDST = (INT32)SRC0&gt;=0 ? 2147483647 : -2147483648</code></p>
    11121124<h4>V_CVT_I32_F32</h4>
    11131125<p>Opcode VOP2: 8 (0x8)<br />
     
    11341146if (SRC0!=NAN)
    11351147    VDST = (INT32)MAX(MIN(RNDTZINT(ASDOUBLE(SRC0)), 2147483647.0), -2147483648.0)</code></p>
     1148<h4>V_CVT_RPI_I32_F32</h4>
     1149<p>Opcode VOP2: 12 (0xc)<br />
     1150Opcode VOP3A: 396 (0x18c) for GCN 1.0/1.1; 332 (0x14c) for GCN 1.2<br />
     1151Syntax: V_CVT_RPI_I32_F32 VDST, SRC0<br />
     1152Description: Convert 32-bit floating point value from SRC0 to signed 32-bit integer, and
     1153store result to VDST. Conversion adds 0.5 to value and rounds negative infinity (floor).
     1154If value is higher/lower than maximal/minimal integer then store MAX_INT32/MIN_INT32 to VDST.
     1155If input value is NaN/-NaN then store MAX_INT32/MIN_INT32 to VDST.<br />
     1156Description:<br />
     1157<code>if (ABS(SRC0)!=NAN)
     1158    VDST = (INT32)MAX(MIN(FLOOR(ASFLOAT(SRC0) + 0.5), 2147483647.0), -2147483648.0)
     1159else
     1160    VDST = (INT32)SRC0&gt;=0 ? 2147483647 : -2147483648</code></p>
    11361161<h4>V_CVT_U32_F32</h4>
    11371162<p>Opcode VOP2: 7 (0x7)<br />
     
    11681193Opcode VOP3A: 386 (0x182) for GCN 1.0/1.1; 322 (0x142) for GCN 1.2<br />
    11691194Syntax: V_READFIRSTLANE_B32 SDST, VSRC0<br />
    1170 Description: Copy one VSRC0 lane value to one SDST. Lane (thread id) is first active lane id or
    1171 first lane id all lanes are inactive. SSRC1 can be SGPR or M0. Ignores EXEC mask.<br />
    1172 Operation:<br />
     1195Description: Copy one VSRC0 lane value to one SDST. Lane (thread id) is first active lane id
     1196or first lane id all lanes are inactive. SSRC1 can be SGPR or M0. Ignores EXEC mask.<br />
    11731197Operation:<br />
    11741198<code>UINT8 firstlane = 0