Changes between Version 10 and Version 11 of GcnInstrsVop2


Ignore:
Timestamp:
Nov 22, 2015, 10:00:17 PM (5 years ago)
Author:
trac
Comment:

--

Legend:

Unmodified
Added
Removed
Modified
  • GcnInstrsVop2

    v10 v11  
    567567Opcode: VOP3a: 283 (0x11b) for GCN 1.0/1.1; 275 (0x113) for GCN 1.2<br />
    568568Syntax: V_AND_B32 VDST, SRC0, SRC1<br />
    569 Description: Do bitwise AND on SRC0 and SRC1 and store result to VDST.
     569Description: Do bitwise AND on SRC0 and SRC1, store result to VDST.
    570570CLAMP and OMOD modifier doesn't affect on result.<br />
    571571Operation:<br />
     
    873873Operation:<br />
    874874<code>VDST = ASFLOAT(SRC0) * ASFLOAT(SRC1)</code></p>
    875 <h4>V_MUL_HI_I32_24</h4>
     875<h4>V_MUL_HI_I32_I24</h4>
    876876<p>Opcode VOP2: 10 (0xa) for GCN 1.0/1.1; 7 (0x7) for GCN 1.2<br />
    877877Opcode VOP3a: 266 (0x10a) for GCN 1.0/1.1; 263 (0x107) for GCN 1.2<br />
    878 Syntax: V_MUL_HI_I32_24 VDST, SRC0, SRC1<br />
     878Syntax: V_MUL_HI_I32_I24 VDST, SRC0, SRC1<br />
    879879Description: Multiply 24-bit signed integer value from SRC0 by 24-bit signed value from SRC1
    880880and store higher 16-bit of the result to VDST with sign extension.
     
    915915Opcode: VOP3a: 284 (0x11c) for GCN 1.0/1.1; 276 (0x114) for GCN 1.2<br />
    916916Syntax: V_OR_B32 VDST, SRC0, SRC1<br />
    917 Description: Do bitwise OR operation on SRC0 and SRC1 and store result to VDST.
     917Description: Do bitwise OR operation on SRC0 and SRC1, store result to VDST.
    918918CLAMP and OMOD modifier doesn't affect on result.<br />
    919919Operation:<br />
     
    963963VDST = temp
    964964SDST = (SDST&amp;~mask) | ((temp &gt;&gt; 32) ? mask : 0)</code></p>
    965 <h4>V_SUBREV_F32</h4>
    966 <p>Opcode VOP2: 5 (0x5) for GCN 1.0/1.1; 2 (0x3) for GCN 1.2<br />
    967 Opcode VOP3a: 261 (0x105) for GCN 1.0/1.1; 259 (0x103) for GCN 1.2<br />
    968 Syntax: V_SUBREV_F32 VDST, SRC0, SRC1<br />
    969 Description: Subtract FP value of SRC0 from FP value of SRC1 and store result to VDST.<br />
    970 Operation:<br />
    971 <code>VDST = ASFLOAT(SRC1) - ASFLOAT(SRC0)</code></p>
    972965<h4>V_SUBBREV_U32</h4>
    973966<p>Opcode VOP2: 42 (0x2a) for GCN 1.0/1.1; 30 (0x1e) for GCN 1.2<br />
     
    985978VDST = temp
    986979SDST = (SDST&amp;~mask) | ((temp &gt;&gt; 32) ? mask : 0)</code></p>
     980<h4>V_SUBREV_F32</h4>
     981<p>Opcode VOP2: 5 (0x5) for GCN 1.0/1.1; 2 (0x3) for GCN 1.2<br />
     982Opcode VOP3a: 261 (0x105) for GCN 1.0/1.1; 259 (0x103) for GCN 1.2<br />
     983Syntax: V_SUBREV_F32 VDST, SRC0, SRC1<br />
     984Description: Subtract FP value of SRC0 from FP value of SRC1 and store result to VDST.<br />
     985Operation:<br />
     986<code>VDST = ASFLOAT(SRC1) - ASFLOAT(SRC0)</code></p>
    987987<h4>V_SUBREV_I32, V_SUBREV_U32</h4>
    988988<p>Opcode VOP2: 39 (0x27) for GCN 1.0/1.1; 27 (0x1b) for GCN 1.2<br />
     
    10021002<p>Opcode: VOP2: 29 (0x1d) for GCN 1.0/1.1; 21 (0x15) for GCN 1.2<br />
    10031003Opcode: VOP3a: 285 (0x11d) for GCN 1.0/1.1; 277 (0x115) for GCN 1.2<br />
    1004 Syntax: V_OR_B32 VDST, SRC0, SRC1<br />
    1005 Description: Do bitwise XOR operation on SRC0 and SRC1 and store result to VDST.
     1004Syntax: V_XOR_B32 VDST, SRC0, SRC1<br />
     1005Description: Do bitwise XOR operation on SRC0 and SRC1, store result to VDST.
    10061006CLAMP and OMOD modifier doesn't affect on result.<br />
    10071007Operation:<br />