Changes between Version 31 and Version 32 of GcnInstrsVop2
- Timestamp:
- 11/25/17 14:00:31 (6 years ago)
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GcnInstrsVop2
v31 v32 842 842 Description: Add SRC0 to SRC1 and store result to VDST and store carry flag to 843 843 SDST (or VCC) bit with number that equal to lane id. SDST is 64-bit. 844 Bits for inactive threads in SDST are always zeroed.<br /> 844 Bits for inactive threads in SDST are always zeroed. 845 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 845 846 Operation:<br /> 846 847 <code>UINT64 temp = (UINT64)SRC0 + (UINT64)SRC1 847 VDST = temp848 VDST = CLAMP ? MIN(temp, 0xffffffff) : temp 848 849 SDST = 0 849 850 UINT64 mask = (1ULL<<LANEID) … … 858 859 Description: Add SRC0 to SRC1 and store result to VDST and store carry flag to 859 860 SDST (or VCC) bit with number that equal to lane id. SDST is 64-bit. 860 Bits for inactive threads in SDST are always zeroed.<br /> 861 Bits for inactive threads in SDST are always zeroed. 862 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 861 863 Operation:<br /> 862 864 <code>UINT64 temp = (UINT64)SRC0 + (UINT64)SRC1 863 VDST = temp865 VDST = CLAMP ? MIN(temp, 0xffffffff) : temp 864 866 SDST = 0 865 867 UINT64 mask = (1ULL<<LANEID) … … 870 872 Syntax: V_ADD_U16 VDST, SRC0, SRC1<br /> 871 873 Description: Add two 16-bit unsigned values from SRC0 and SRC1 and 872 store 16-bit unsigned result to VDST.<br /> 873 Operation:<br /> 874 <code>VDST = (SRC0 + SRC1) & 0xffff</code></p> 874 store 16-bit unsigned result to VDST. 875 If CLAMP modifier supplied, then result is saturated to 16-bit unsigned value.<br /> 876 Operation:<br /> 877 <code>UINT32 TEMP = (SRC0 & 0xffff) + (SRC1 & 0xffff) 878 VDST = CLAMP ? MIN(0xffff, TEMP) : TEMP</code></p> 875 879 <h4>V_ADD_U32 (GCN 1.4)</h4> 876 880 <p>Opcode VOP2: 52 (0x34) for GCN 1.4<br /> 877 881 Opcode VOP3B: 308 (0x134) for GCN 1.4<br /> 878 882 Syntax: V_ADD_U32 VDST, SRC0, SRC1<br /> 879 Description: Add SRC0 to SRC1 and store result to VDST.<br /> 880 Operation:<br /> 881 <code>VDST = SRC0 + SRC1</code></p> 883 Description: Add SRC0 to SRC1 and store result to VDST. 884 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 885 Operation:<br /> 886 <code>UINT64 TEMP = (UINT64)SRC0 + SRC1 887 VDST = CLAMP ? MIN(TEMP, 0xffffffff) : TEMP</code></p> 882 888 <h4>V_ADDC_CO_U32</h4> 883 889 <p>Opcode VOP2: 28 (0x1c) for GCN 1.4<br /> … … 888 894 and store result to VDST and store carry flag to SDST (or VCC) bit with number 889 895 that equal to lane id. SDST and SSRC2 are 64-bit. 890 Bits for inactive threads in SDST are always zeroed.<br /> 896 Bits for inactive threads in SDST are always zeroed. 897 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 891 898 Operation:<br /> 892 899 <code>UINT64 mask = (1ULL<<LANEID) … … 894 901 UINT64 temp = (UINT64)SRC0 + (UINT64)SRC1 + CC 895 902 SDST = 0 896 VDST = temp903 VDST = CLAMP ? MIN(temp, 0xffffffff) : temp 897 904 SDST = (SDST&~mask) | ((temp >> 32) ? mask : 0)</code></p> 898 905 <h4>V_ADDC_U32 (GCN 1.0/1.1/1.2)</h4> … … 904 911 and store result to VDST and store carry flag to SDST (or VCC) bit with number 905 912 that equal to lane id. SDST and SSRC2 are 64-bit. 906 Bits for inactive threads in SDST are always zeroed.<br /> 913 Bits for inactive threads in SDST are always zeroed. 914 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 907 915 Operation:<br /> 908 916 <code>UINT64 mask = (1ULL<<LANEID) … … 910 918 UINT64 temp = (UINT64)SRC0 + (UINT64)SRC1 + CC 911 919 SDST = 0 912 VDST = temp920 VDST = CLAMP ? MIN(temp, 0xffffffff) : temp 913 921 SDST = (SDST&~mask) | ((temp >> 32) ? mask : 0)</code></p> 914 922 <h4>V_AND_B32</h4> … … 1407 1415 Syntax: V_SUB_U16 VDST, SRC0, SRC1<br /> 1408 1416 Description: Subtract unsigned 16-bit value of SRC1 from SRC0 and store 1409 16-bit unsigned result to VDST.<br /> 1410 Operation:<br /> 1411 <code>VDST = (SRC0 - SRC1) & 0xffff</code></p> 1417 16-bit unsigned result to VDST. 1418 If CLAMP modifier supplied, then result is saturated to 16-bit unsigned value.<br /> 1419 Operation:<br /> 1420 <code>INT32 TEMP = (SRC0 & 0xffff) - (SRC1 & 0xffff) 1421 VDST = CLAMP ? MAX(TEMP, 0) : TEMP</code></p> 1412 1422 <h4>V_SUB_CO_U32</h4> 1413 1423 <p>Opcode VOP2: 26 (0x1a) for GCN 1.4<br /> … … 1417 1427 Description: Subtract SRC1 from SRC0 and store result to VDST and store borrow flag to 1418 1428 SDST (or VCC) bit with number that equal to lane id. SDST is 64-bit. 1419 Bits for inactive threads in SDST are always zeroed.<br /> 1429 Bits for inactive threads in SDST are always zeroed. 1430 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 1420 1431 Operation:<br /> 1421 1432 <code>UINT64 temp = (UINT64)SRC0 - (UINT64)SRC1 1422 VDST = temp1433 VDST = CLAMP ? (temp>>32 ? 0 : temp) : temp 1423 1434 SDST = 0 1424 1435 UINT64 mask = (1ULL<<LANEID) … … 1433 1444 Description: Subtract SRC1 from SRC0 and store result to VDST and store borrow flag to 1434 1445 SDST (or VCC) bit with number that equal to lane id. SDST is 64-bit. 1435 Bits for inactive threads in SDST are always zeroed.<br /> 1446 Bits for inactive threads in SDST are always zeroed. 1447 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 1436 1448 Operation:<br /> 1437 1449 <code>UINT64 temp = (UINT64)SRC0 - (UINT64)SRC1 1438 VDST = temp1450 VDST = CLAMP ? (temp>>32 ? 0 : temp) : temp 1439 1451 SDST = 0 1440 1452 UINT64 mask = (1ULL<<LANEID) … … 1444 1456 Opcode VOP3B: 309 (0x135) for GCN 1.4<br /> 1445 1457 Syntax: V_SUB_U32 VDST, SRC0, SRC1<br /> 1446 Description: Subtract SRC1 with borrow from SRC0, and store result to VDST.<br /> 1447 Operation:<br /> 1448 <code>VDST = SRC0 - SRC1</code></p> 1458 Description: Subtract SRC1 with borrow from SRC0, and store result to VDST. 1459 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 1460 Operation:<br /> 1461 <code>INT64 TEMP = (UINT64)SRC0 - SRC1 1462 VDST = CLAMP ? MAX(0, TEMP) : TEMP</code></p> 1449 1463 <h4>V_SUBB_CO_U32</h4> 1450 1464 <p>Opcode VOP2: 29 (0x1d) for GCN 1.4<br /> … … 1455 1469 and store result to VDST and store carry flag to SDST (or VCC) bit with number 1456 1470 that equal to lane id. Borrow is stored in SSRC2 bit with number of lane id. 1457 SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed.<br /> 1471 SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed. 1472 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 1458 1473 Operation:<br /> 1459 1474 <code>UINT64 mask = (1ULL<<LANEID) … … 1461 1476 UINT64 temp = (UINT64)SRC0 - (UINT64)SRC1 - CC 1462 1477 SDST = 0 1463 VDST = temp1478 VDST = CLAMP ? (temp>>32 ? 0 : temp) : temp 1464 1479 SDST = (SDST&~mask) | ((temp >> 32) ? mask : 0)</code></p> 1465 1480 <h4>V_SUBB_U32 (GCN 1.0/1.1/1.2)</h4> … … 1471 1486 and store result to VDST and store carry flag to SDST (or VCC) bit with number 1472 1487 that equal to lane id. Borrow is stored in SSRC2 bit with number of lane id. 1473 SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed.<br /> 1488 SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed. 1489 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 1474 1490 Operation:<br /> 1475 1491 <code>UINT64 mask = (1ULL<<LANEID) … … 1477 1493 UINT64 temp = (UINT64)SRC0 - (UINT64)SRC1 - CC 1478 1494 SDST = 0 1479 VDST = temp1495 VDST = CLAMP ? (temp>>32 ? 0 : temp) : temp 1480 1496 SDST = (SDST&~mask) | ((temp >> 32) ? mask : 0)</code></p> 1481 1497 <h4>V_SUBBREV_CO_U32</h4> … … 1487 1503 and store result to VDST and store carry flag to SDST (or VCC) bit with number 1488 1504 that equal to lane id. Borrow is stored in SSRC2 bit with number of lane id. 1489 SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed.<br /> 1505 SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed. 1506 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 1490 1507 Operation:<br /> 1491 1508 <code>UINT64 mask = (1ULL<<LANEID) … … 1493 1510 UINT64 temp = (UINT64)SRC1 - (UINT64)SRC0 - CC 1494 1511 SDST = 0 1495 VDST = temp1512 VDST = CLAMP ? (temp>>32 ? 0 : temp) : temp 1496 1513 SDST = (SDST&~mask) | ((temp >> 32) ? mask : 0)</code></p> 1497 1514 <h4>V_SUBBREV_U32 (GCN 1.0/1.1/1.2)</h4> … … 1503 1520 and store result to VDST and store carry flag to SDST (or VCC) bit with number 1504 1521 that equal to lane id. Borrow is stored in SSRC2 bit with number of lane id. 1505 SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed.<br /> 1522 SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed. 1523 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 1506 1524 Operation:<br /> 1507 1525 <code>UINT64 mask = (1ULL<<LANEID) … … 1509 1527 UINT64 temp = (UINT64)SRC1 - (UINT64)SRC0 - CC 1510 1528 SDST = 0 1511 VDST = temp1529 VDST = CLAMP ? (temp>>32 ? 0 : temp) : temp 1512 1530 SDST = (SDST&~mask) | ((temp >> 32) ? mask : 0)</code></p> 1513 1531 <h4>V_SUBREV_F16</h4> … … 1534 1552 Description: Subtract SRC0 from SRC1 and store result to VDST and store borrow flag to 1535 1553 SDST (or VCC) bit with number that equal to lane id. SDST is 64-bit. 1536 Bits for inactive threads in SDST are always zeroed.<br /> 1554 Bits for inactive threads in SDST are always zeroed. 1555 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 1537 1556 Operation:<br /> 1538 1557 <code>UINT64 temp = (UINT64)SRC1 - (UINT64)SRC0 1539 VDST = temp1558 VDST = CLAMP ? (temp>>32 ? 0 : temp) : temp 1540 1559 SDST = 0 1541 1560 UINT64 mask = (1ULL<<LANEID) … … 1546 1565 Syntax: V_SUBREV_U16 VDST, SRC0, SRC1<br /> 1547 1566 Description: Subtract unsigned 16-bit value of SRC0 from SRC1 and store 1548 16-bit unsigned result to VDST.<br /> 1549 Operation:<br /> 1550 <code>VDST = (SRC1 - SRC0) & 0xffff</code></p> 1567 16-bit unsigned result to VDST. 1568 If CLAMP modifier supplied, then result is saturated to 16-bit unsigned value.<br /> 1569 Operation:<br /> 1570 <code>INT32 TEMP = (SRC1 & 0xffff) - (SRC0 & 0xffff) 1571 VDST = CLAMP ? MAX(0, TEMP) : TEMP</code></p> 1551 1572 <h4>V_SUBREV_U32 (GCN 1.4)</h4> 1552 1573 <p>Opcode VOP2: 54 (0x36) for GCN 1.4<br /> 1553 1574 Opcode VOP3B: 310 (0x136) for GCN 1.4<br /> 1554 1575 Syntax: V_SUBREV_U32 VDST, SRC0, SRC1<br /> 1555 Description: Subtract SRC0 with borrow from SRC1, and store result to VDST.<br /> 1556 Operation:<br /> 1557 <code>VDST = SRC1 - SRC0</code></p> 1576 Description: Subtract SRC0 with borrow from SRC1, and store result to VDST. 1577 If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br /> 1578 Operation:<br /> 1579 <code>INT64 TEMP = (UINT64)SRC1 - SRC0 1580 VDST = CLAMP ? MAX(0, TEMP) : TEMP</code></p> 1558 1581 <h4>V_XOR_B32</h4> 1559 1582 <p>Opcode: VOP2: 29 (0x1d) for GCN 1.0/1.1; 21 (0x15) for GCN 1.2<br />