Changes between Version 5 and Version 6 of GcnInstrsVop2


Ignore:
Timestamp:
Nov 21, 2015, 11:00:21 PM (5 years ago)
Author:
trac
Comment:

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  • GcnInstrsVop2

    v5 v6  
    382382Operation:<br />
    383383<code>VDST = (FLOAT)SRC0 + (FLOAT)SRC1</code></p>
     384<h4>V_AND_B32</h4>
     385<p>Opcode: VOP2: 27 (0x1b) for GCN 1.0/1.1; 19 (0x13) for GCN 1.2<br />
     386Opcode: VOP3a: 283 (0x11b) for GCN 1.0/1.1; 275 (0x113) for GCN 1.2<br />
     387Syntax: V_AND_B32 VDST, SRC0, SRC1<br />
     388Description: Do bitwise AND on SRC0 and SRC1 and store result to VDST.
     389CLAMP and OMOD modifier doesn't affect on result.<br />
     390Operation:<br />
     391<code>VDST = SRC0 &amp; SRC1</code></p>
    384392<h4>V_ASHR_I32</h4>
    385393<p>Opcode VOP2: 23 (0x17) for GCN 1.0/1.1<br />
     
    433441Operation:<br />
    434442<code>VDST = SRC1 &gt;&gt; (SRC0&amp;31)</code></p>
     443<h4>V_MAC_F32</h4>
     444<p>Opcode VOP2: 31 (0x1f) for GCN 1.0/1.1; 22 (0x16) for GCN 1.2<br />
     445Opcode VOP3a: 287 (0x11f) for GCN 1.0/1.1; 278 (0x116) for GCN 1.2<br />
     446Syntax: V_MAC_F32 VDST, SRC0, SRC1<br />
     447Description: Multiply FP value from SRC0 by FP value from SRC1 and add result to VDST.<br />
     448Operation:<br />
     449<code>VDST = (FLOAT)SRC0 * (FLOAT)SRC1 + (FLOAT)VDST</code></p>
    435450<h4>V_MAC_LEGACY_F32</h4>
    436451<p>Opcode VOP2: 6 (0x6) for GCN 1.0/1.1<br />
    437452Opcode VOP3a: 262 (0x106) for GCN 1.0/1.1<br />
    438 Syntax: V_MUL_LEGACY_F32 VDST, SRC0, SRC1<br />
     453Syntax: V_MAC_LEGACY_F32 VDST, SRC0, SRC1<br />
    439454Description: Multiply FP value from SRC0 by FP value from SRC1 and add result to VDST.
    440455If one of value is 0.0 then always do not change VDST (do not apply IEEE rules for 0.0*x).<br />
     
    566581Operation:<br />
    567582<code>VDST = (UINT32)(SRC0&amp;0xffffff) * (UINT32)(SRC1&amp;0xffffff)</code></p>
     583<h4>V_OR_B32</h4>
     584<p>Opcode: VOP2: 28 (0x1c) for GCN 1.0/1.1; 20 (0x14) for GCN 1.2<br />
     585Opcode: VOP3a: 284 (0x11c) for GCN 1.0/1.1; 276 (0x114) for GCN 1.2<br />
     586Syntax: V_OR_B32 VDST, SRC0, SRC1<br />
     587Description: Do bitwise OR operation on SRC0 and SRC1 and store result to VDST.
     588CLAMP and OMOD modifier doesn't affect on result.<br />
     589Operation:<br />
     590<code>VDST = SRC0 | SRC1</code></p>
    568591<h4>V_READLANE_B32</h4>
    569592<p>Opcode VOP2: 1 (0x1) for GCN 1.0/1.1<br />
     
    596619Operation:<br />
    597620<code>VDST = (FLOAT)SRC1 - (FLOAT)SRC0</code></p>
     621<h4>V_XOR_B32</h4>
     622<p>Opcode: VOP2: 29 (0x1d) for GCN 1.0/1.1; 21 (0x15) for GCN 1.2<br />
     623Opcode: VOP3a: 285 (0x11d) for GCN 1.0/1.1; 277 (0x115) for GCN 1.2<br />
     624Syntax: V_OR_B32 VDST, SRC0, SRC1<br />
     625Description: Do bitwise XOR operation on SRC0 and SRC1 and store result to VDST.
     626CLAMP and OMOD modifier doesn't affect on result.<br />
     627Operation:<br />
     628<code>VDST = SRC0 ^ SRC1</code></p>
    598629}}}