| 797 | <h4>V_CUBEID_F32</h4> |
| 798 | <p>Opcode: 324 (0x144) for GCN 1.0/1.1; 452 (0x1c4) for GCN 1.2<br /> |
| 799 | Syntax: V_CUBEID_F32 VDST, SRC0, SRC1, SRC2<br /> |
| 800 | Description: Cubemap face identification. Determine face by comparing three single FP values: |
| 801 | SRC0 (X), SRC1 (Y), SRC2(Z). Choose highest absolute value and check whether is negative or |
| 802 | positive. Store floating point value of face ID: (DIM*2.0)+(V[DIM]>=0?1:0), |
| 803 | where DIM is number of choosen dimension (X - 0, Y - 1, Z - 2); |
| 804 | V - vector = [SRC0, SRC1, SRC2].<br /> |
| 805 | Operation:<br /> |
| 806 | <code>FLOAT SF0 = ASFLOAT(SRC0) |
| 807 | FLOAT SF1 = ASFLOAT(SRC1) |
| 808 | FLOAT SF2 = ASFLOAT(SRC2) |
| 809 | FLOAT OUT |
| 810 | if (ABS(SF2) >= ABS(SF1) && ABS(SF2) >= ABS(SF0)) |
| 811 | OUT = (SF2 >= 0.0) ? 4 : 5 |
| 812 | else if (ABS(SF1) >= ABS(SF0) |
| 813 | OUT = (SF1 >= 0.0) ? 2 : 3 |
| 814 | else |
| 815 | OUT = (SF0 >= 0.0) ? 0 : 1 |
| 816 | VDST = OUT</code></p> |
| 817 | <h4>V_MAD_F32</h4> |
| 818 | <p>Opcode: 321 (0x141) for GCN 1.0/1.1; 449 (0x1c1) for GCN 1.2<br /> |
| 819 | Syntax: V_MAD_F32 VDST, SRC0, SRC1, SRC2<br /> |
| 820 | Description: Multiply FP value from SRC0 by FP value from SRC1 and add SRC2, and store |
| 821 | result to VDST.<br /> |
| 822 | Operation:<br /> |
| 823 | <code>VDST = ASFLOAT(SRC0) * ASFLOAT(SRC1) + ASFLOAT(SRC2)</code></p> |
| 824 | <h4>V_MAD_I32_I24</h4> |
| 825 | <p>Opcode: 322 (0x142) for GCN 1.0/1.1; 450 (0x1c2) for GCN 1.2<br /> |
| 826 | Syntax: V_MAD_I32_I24 VDST, SRC0, SRC1, SRC2<br /> |
| 827 | Description: Multiply 24-bit signed integer value from SRC0 by 24-bit signed value from SRC1, |
| 828 | add SRC2 to this product, and and store result to VDST.<br /> |
| 829 | Operation:<br /> |
| 830 | <code>INT32 V0 = (INT32)((SRC0&0x7fffff) | (SSRC0&0x800000 ? 0xff800000 : 0)) |
| 831 | INT32 V1 = (INT32)((SRC1&0x7fffff) | (SSRC1&0x800000 ? 0xff800000 : 0)) |
| 832 | VDST = V0 * V1 + SRC2</code></p> |
800 | | Description:</p> |
| 836 | Description: Multiply FP value from SRC0 by FP value from SRC1 and add result to SRC2, and |
| 837 | store result to VDST. If one of value is 0.0 then always store SRC2 to VDST |
| 838 | (do not apply IEEE rules for 0.0*x).<br /> |
| 839 | Operation:<br /> |
| 840 | <code>if (ASFLOAT(SRC0)!=0.0 && ASFLOAT(SRC1)!=0.0) |
| 841 | VDST = ASFLOAT(SRC0) * ASFLOAT(SRC1) + ASFLOAT(SRC2)</code></p> |
| 842 | <h4>V_MAD_U32_U24</h4> |
| 843 | <p>Opcode: 323 (0x143) for GCN 1.0/1.1; 451 (0x1c3) for GCN 1.2<br /> |
| 844 | Syntax: V_MAD_U32_U24 VDST, SRC0, SRC1, SRC2<br /> |
| 845 | Description: Multiply 24-bit unsigned integer value from SRC0 by 24-bit unsigned value |
| 846 | from SRC1, add SRC2 to this product and store result to VDST.<br /> |
| 847 | Operation:<br /> |
| 848 | <code>VDST = (UINT32)(SRC0&0xffffff) * (UINT32)(SRC1&0xffffff) + SRC2</code></p> |