| | 1 | [wiki:ClrxToc Back to Table of content] |
| | 2 | {{{ |
| | 3 | #!html |
| | 4 | <h2>AMD GCN Instruction Set Architecture</h2> |
| | 5 | <p>This chapter describes an instruction set of the GCN architecture, their addressing modes |
| | 6 | and features.</p> |
| | 7 | <p>The GPU architectures differs significantly from CPU architectures. Main pressure in the GPU |
| | 8 | architectures is the parallelism and an efficient hiding memory latencies. |
| | 9 | The most CPU architectures provides an unified memory access approach. By contrast, |
| | 10 | the most GPU's have few different resource types for which access is different. Hence, |
| | 11 | few instruction's kinds: scalar, vector, main memory access instructions.</p> |
| | 12 | <h3>Language that describes operation.</h3> |
| | 13 | <p>In 'Operation' field, this document describes operation in specific computer language. |
| | 14 | This language is very similar to C/C++ and uses this same expresion's syntax |
| | 15 | (these same operators and their precedence). In this language, we use types there are |
| | 16 | to similar C/C++ types:</p> |
| | 17 | <ul> |
| | 18 | <li>UINT8, INT8 - unsigned and signed byte</li> |
| | 19 | <li>UINT16, INT16 - unsigned and signed 16-bit word</li> |
| | 20 | <li>UINT32, INT32 - unsigned and signed dword (32-bit word)</li> |
| | 21 | <li>UINT64, INT64 - unsigned and signed 64-bit word</li> |
| | 22 | <li>HALF, FLOAT, DOUBLE - half, single and double precision floating point</li> |
| | 23 | </ul> |
| | 24 | <hr /> |
| | 25 | <ul> |
| | 26 | <li><a href="GcnOperands">GCN Operands</a></li> |
| | 27 | <li><a href="GcnInstrsSop2">SOP2 instructions</a></li> |
| | 28 | </ul> |
| | 29 | <hr /> |
| | 30 | }}} |
