151 | | <h2>STATUS Register</h2> |
| 151 | <h3>Scalar registers layout</h3> |
| 152 | <p>The user data registers hold execution setup (global offset, pointers, arguments pointers, |
| 153 | the same arguments). User data can allow to pass any constant data to kernel from host. |
| 154 | The register 1-5 bits of PGM_RSRC2 indicates how many first scalar registers hold user data. |
| 155 | Further scalar registers store group id and it are different for every wavefront. |
| 156 | Number of that registers determined from number of enabled dimensions (fields TGID_X_EN, |
| 157 | TGID_Y_EN and TGID_Z_EN in PGM_RSRC2). Last scalar registers is TG_SIZE value and |
| 158 | scratch buffer wave offset (for handling scratch buffer).</p> |
| 159 | <table> |
| 160 | <thead> |
| 161 | <tr> |
| 162 | <th>Register</th> |
| 163 | <th>Number of registers</th> |
| 164 | <th>Description</th> |
| 165 | </tr> |
| 166 | </thead> |
| 167 | <tbody> |
| 168 | <tr> |
| 169 | <td>SGPR[0:UN-1]</td> |
| 170 | <td>UN - number of user data registers</td> |
| 171 | <td>User data registers</td> |
| 172 | </tr> |
| 173 | <tr> |
| 174 | <td>SGPR[UN:UN+DIMS-1]</td> |
| 175 | <td>DIMS - number of enabled dimensions</td> |
| 176 | <td>Group Id</td> |
| 177 | </tr> |
| 178 | <tr> |
| 179 | <td>SGPR[UN+DIMS]</td> |
| 180 | <td>TGSIZE - 1 if TGSIZE_EN enabled</td> |
| 181 | <td>TGSIZE</td> |
| 182 | </tr> |
| 183 | <tr> |
| 184 | <td>SGPR[UN+DIMS+TGSIZE]</td> |
| 185 | <td>SCRATCH_EN - 1 if SCRATCH enabled</td> |
| 186 | <td>Scratch wave offset</td> |
| 187 | </tr> |
| 188 | </tbody> |
| 189 | </table> |
| 190 | <h3>STATUS Register</h3> |