Changes between Version 2 and Version 3 of GcnState


Ignore:
Timestamp:
05/08/16 17:00:31 (8 years ago)
Author:
trac
Comment:

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  • GcnState

    v2 v3  
    155155Further scalar registers store group id and it are different for every wavefront.
    156156Number of that registers determined from number of enabled dimensions (fields TGID_X_EN,
    157 TGID_Y_EN and TGID_Z_EN in PGM_RSRC2). Last scalar registers is TG_SIZE value and
    158 scratch buffer wave offset (for handling scratch buffer).</p>
    159 <table>
    160 <thead>
    161 <tr>
    162 <th>Register</th>
     157TGID_Y_EN and TGID_Z_EN in PGM_RSRC2). Next scalar registers is TG_SIZE value and
     158scratch buffer wave offset (for handling scratch buffer). Last allocated SGPR's
     159are VCC, FLAT_SCRATCH and XNACK_MASK, depending on GCN architecture.
     160Following table is depicting layout of SGPR's:</p>
     161<table>
     162<thead>
     163<tr>
     164<th>First register</th>
    163165<th>Number of registers</th>
    164166<th>Description</th>
    … …  
    167169<tbody>
    168170<tr>
    169 <td>SGPR[0:UN-1]</td>
    170 <td>UN - number of user data registers</td>
     171<td>SGPR0</td>
     172<td>number of user data registers</td>
    171173<td>User data registers</td>
    172174</tr>
    173175<tr>
    174 <td>SGPR[UN:UN+DIMS-1]</td>
    175 <td>DIMS - number of enabled dimensions</td>
     176<td>next SGPR</td>
     177<td>number of enabled dimensions</td>
    176178<td>Group Id</td>
    177179</tr>
    178180<tr>
    179 <td>SGPR[UN+DIMS]</td>
    180 <td>TGSIZE - 1 if TGSIZE_EN enabled</td>
     181<td>next SGPR</td>
     182<td>1 if TGSIZE_EN enabled</td>
    181183<td>TGSIZE</td>
    182184</tr>
    183185<tr>
    184 <td>SGPR[UN+DIMS+TGSIZE]</td>
    185 <td>SCRATCH_EN - 1 if SCRATCH enabled</td>
     186<td>next SGPR</td>
     187<td>1 if SCRATCH enabled</td>
    186188<td>Scratch wave offset</td>
    187189</tr>
    188 </tbody>
    189 </table>
     190<tr>
     191<td>SGPR[N-6]</td>
     192<td>2 registers</td>
     193<td>FLAT_SCRATCH (GCN 1.2)</td>
     194</tr>
     195<tr>
     196<td>SGPR[N-4]</td>
     197<td>2 registers</td>
     198<td>XNACK_MASK (GCN 1.2) or FLAT_SCRATCH (GCN 1.1)</td>
     199</tr>
     200<tr>
     201<td>SGPR[N-2]</td>
     202<td>2 registers</td>
     203<td>VCC</td>
     204</tr>
     205</tbody>
     206</table>
     207<p>Note: N - number of allocated SGPR's.</p>
    190208<h3>STATUS Register</h3>
    191209<p>Table of fields for STATUS Register:</p>