Changes between Version 15 and Version 16 of GcnTimings


Ignore:
Timestamp:
05/30/16 21:00:25 (8 years ago)
Author:
trac
Comment:

--

Legend:

Unmodified
Added
Removed
Modified
  • GcnTimings

    v15 v16  
    234234</table>
    235235<h3>VOP2 Instruction timings</h3>
    236 <p>All VOP2 instructions takes 4 cycles.</p>
     236<p>All VOP2 instructions takes 4 cycles. All instruction can achieve throughput 1 instruction
     237per cycle.</p>
    237238<h3>VOP1 Instruction timings</h3>
    238 <p>Timings of VOP1 instructions are in this table:</p>
     239<p>Maximum throughput of these instruction can be calculated by using expression
     240<code>(1/(CYCLES/4))</code> - for 4 cycles is 1 instruction per cycle, for 8 cycles is 1/2 instruction
     241per cycle and etc.
     242Timings of VOP1 instructions are in this table:</p>
    239243<table>
    240244<thead>
     
    448452</table>
    449453<h3>VOPC Instruction timings</h3>
    450 <p>All 32-bit comparison instructions takes 4 cycles. All 64-bit comparison instructions takes
     454<p>Maximum throughput of these instruction can be calculated by using expression
     455<code>(1/(CYCLES/4))</code> - for 4 cycles is 1 instruction per cycle, for 8 cycles is 1/2 instruction
     456per cycle and etc.
     457All 32-bit comparison instructions takes 4 cycles. All 64-bit comparison instructions takes
    451458DPFACTOR*4 cycles.</p>
    452459<h3>VOP3 Instruction timings</h3>
    453 <p>Timings of VOP3 instructions are in this table:</p>
     460<p>Maximum throughput of these instruction can be calculated by using expression
     461<code>(1/(CYCLES/4))</code> - for 4 cycles is 1 instruction per cycle, for 8 cycles is 1/2 instruction
     462per cycle and etc.
     463Timings of VOP3 instructions are in this table:</p>
    454464<table>
    455465<thead>
     
    646656<th>Instruction</th>
    647657<th>Cycles</th>
    648 <th>Instruction</th>
    649 <th>Cycles</th>
     658<th>Throughput</th>
    650659</tr>
    651660</thead>
     
    654663<td>DS_ADD_RTN_U32</td>
    655664<td>8</td>
     665<td>1/4</td>
     666</tr>
     667<tr>
     668<td>DS_ADD_RTN_U64</td>
     669<td>12</td>
     670<td>1/6</td>
     671</tr>
     672<tr>
     673<td>DS_ADD_SRC2_U32</td>
     674<td>4</td>
     675<td>1/4</td>
     676</tr>
     677<tr>
     678<td>DS_ADD_SRC2_U64</td>
     679<td>8</td>
     680<td>1/8</td>
     681</tr>
     682<tr>
     683<td>DS_ADD_U32</td>
     684<td>8</td>
     685<td>1/4</td>
     686</tr>
     687<tr>
     688<td>DS_ADD_U64</td>
     689<td>12</td>
     690<td>1/6</td>
     691</tr>
     692<tr>
     693<td>DS_AND_B32</td>
     694<td>8</td>
     695<td>1/4</td>
     696</tr>
     697<tr>
     698<td>DS_AND_B64</td>
     699<td>12</td>
     700<td>1/6</td>
     701</tr>
     702<tr>
     703<td>DS_AND_RTN_B32</td>
     704<td>8</td>
     705<td>1/4</td>
     706</tr>
     707<tr>
     708<td>DS_AND_RTN_B64</td>
     709<td>12</td>
     710<td>1/6</td>
     711</tr>
     712<tr>
     713<td>DS_AND_SRC2_B32</td>
     714<td>4</td>
     715<td>1/4</td>
     716</tr>
     717<tr>
     718<td>DS_AND_SRC2_B64</td>
     719<td>8</td>
     720<td>1/8</td>
     721</tr>
     722<tr>
     723<td>DS_APPEND</td>
     724<td>4</td>
     725<td>?</td>
     726</tr>
     727<tr>
     728<td>DS_CMPST_B32</td>
     729<td>12</td>
     730<td>1/6</td>
     731</tr>
     732<tr>
     733<td>DS_CMPST_B64</td>
     734<td>20</td>
     735<td>1/10</td>
     736</tr>
     737<tr>
     738<td>DS_CMPST_F32</td>
     739<td>12</td>
     740<td>1/6</td>
     741</tr>
     742<tr>
     743<td>DS_CMPST_F64</td>
     744<td>20</td>
     745<td>1/10</td>
     746</tr>
     747<tr>
     748<td>DS_CMPST_RTN_B32</td>
     749<td>12</td>
     750<td>1/6</td>
     751</tr>
     752<tr>
     753<td>DS_CMPST_RTN_B64</td>
     754<td>20</td>
     755<td>1/10</td>
     756</tr>
     757<tr>
     758<td>DS_CMPST_RTN_F32</td>
     759<td>12</td>
     760<td>1/6</td>
     761</tr>
     762<tr>
     763<td>DS_CMPST_RTN_F64</td>
     764<td>20</td>
     765<td>1/10</td>
     766</tr>
     767<tr>
     768<td>DS_CONDXCHG32_RTN_B128</td>
     769<td>?</td>
     770<td>?</td>
     771</tr>
     772<tr>
     773<td>DS_CONDXCHG32_RTN_B64</td>
     774<td>?</td>
     775<td>?</td>
     776</tr>
     777<tr>
     778<td>DS_CONSUME</td>
     779<td>4</td>
     780<td>?</td>
     781</tr>
     782<tr>
     783<td>DS_DEC_RTN_U32</td>
     784<td>8</td>
     785<td>1/4</td>
     786</tr>
     787<tr>
     788<td>DS_DEC_RTN_U64</td>
     789<td>12</td>
     790<td>1/6</td>
     791</tr>
     792<tr>
     793<td>DS_DEC_SRC2_U32</td>
     794<td>4</td>
     795<td>1/4</td>
     796</tr>
     797<tr>
     798<td>DS_DEC_SRC2_U64</td>
     799<td>8</td>
     800<td>1/8</td>
     801</tr>
     802<tr>
     803<td>DS_DEC_U32</td>
     804<td>8</td>
     805<td>1/4</td>
     806</tr>
     807<tr>
     808<td>DS_DEC_U64</td>
     809<td>12</td>
     810<td>1/6</td>
     811</tr>
     812<tr>
     813<td>DS_GWS_BARRIER</td>
     814<td>?</td>
     815<td>?</td>
     816</tr>
     817<tr>
     818<td>DS_GWS_INIT</td>
     819<td>?</td>
     820<td>?</td>
     821</tr>
     822<tr>
     823<td>DS_GWS_SEMA_BR</td>
     824<td>?</td>
     825<td>?</td>
     826</tr>
     827<tr>
     828<td>DS_GWS_SEMA_P</td>
     829<td>?</td>
     830<td>?</td>
     831</tr>
     832<tr>
     833<td>DS_GWS_SEMA_RELEASE_ALL</td>
     834<td>?</td>
     835<td>?</td>
     836</tr>
     837<tr>
     838<td>DS_GWS_SEMA_V</td>
     839<td>?</td>
     840<td>?</td>
     841</tr>
     842<tr>
     843<td>DS_INC_RTN_U32</td>
     844<td>8</td>
     845<td>1/4</td>
     846</tr>
     847<tr>
     848<td>DS_INC_RTN_U64</td>
     849<td>12</td>
     850<td>1/6</td>
     851</tr>
     852<tr>
     853<td>DS_INC_SRC2_U32</td>
     854<td>4</td>
     855<td>1/4</td>
     856</tr>
     857<tr>
     858<td>DS_INC_SRC2_U64</td>
     859<td>8</td>
     860<td>1/8</td>
     861</tr>
     862<tr>
     863<td>DS_INC_U32</td>
     864<td>8</td>
     865<td>1/4</td>
     866</tr>
     867<tr>
     868<td>DS_INC_U64</td>
     869<td>12</td>
     870<td>1/6</td>
     871</tr>
     872<tr>
     873<td>DS_MAX_F32</td>
     874<td>8</td>
     875<td>1/4</td>
     876</tr>
     877<tr>
     878<td>DS_MAX_F64</td>
     879<td>12</td>
     880<td>1/6</td>
     881</tr>
     882<tr>
     883<td>DS_MAX_I32</td>
     884<td>8</td>
     885<td>1/4</td>
     886</tr>
     887<tr>
     888<td>DS_MAX_I64</td>
     889<td>12</td>
     890<td>1/6</td>
     891</tr>
     892<tr>
     893<td>DS_MAX_RTN_F32</td>
     894<td>8</td>
     895<td>1/4</td>
     896</tr>
     897<tr>
     898<td>DS_MAX_RTN_F64</td>
     899<td>12</td>
     900<td>1/6</td>
     901</tr>
     902<tr>
     903<td>DS_MAX_RTN_I32</td>
     904<td>8</td>
     905<td>1/4</td>
     906</tr>
     907<tr>
     908<td>DS_MAX_RTN_I64</td>
     909<td>12</td>
     910<td>1/6</td>
     911</tr>
     912<tr>
     913<td>DS_MAX_RTN_U32</td>
     914<td>8</td>
     915<td>1/4</td>
     916</tr>
     917<tr>
     918<td>DS_MAX_RTN_U64</td>
     919<td>12</td>
     920<td>1/6</td>
     921</tr>
     922<tr>
     923<td>DS_MAX_SRC2_F32</td>
     924<td>4</td>
     925<td>1/4</td>
     926</tr>
     927<tr>
     928<td>DS_MAX_SRC2_F64</td>
     929<td>8</td>
     930<td>1/8</td>
     931</tr>
     932<tr>
     933<td>DS_MAX_SRC2_I32</td>
     934<td>4</td>
     935<td>1/4</td>
     936</tr>
     937<tr>
     938<td>DS_MAX_SRC2_I64</td>
     939<td>8</td>
     940<td>1/8</td>
     941</tr>
     942<tr>
     943<td>DS_MAX_SRC2_U32</td>
     944<td>4</td>
     945<td>1/4</td>
     946</tr>
     947<tr>
     948<td>DS_MAX_SRC2_U64</td>
     949<td>8</td>
     950<td>1/8</td>
     951</tr>
     952<tr>
     953<td>DS_MAX_U32</td>
     954<td>8</td>
     955<td>1/4</td>
     956</tr>
     957<tr>
     958<td>DS_MAX_U64</td>
     959<td>12</td>
     960<td>1/6</td>
     961</tr>
     962<tr>
     963<td>DS_MIN_F32</td>
     964<td>8</td>
     965<td>1/4</td>
     966</tr>
     967<tr>
     968<td>DS_MIN_F64</td>
     969<td>12</td>
     970<td>1/6</td>
     971</tr>
     972<tr>
     973<td>DS_MIN_I32</td>
     974<td>8</td>
     975<td>1/4</td>
     976</tr>
     977<tr>
     978<td>DS_MIN_I64</td>
     979<td>12</td>
     980<td>1/6</td>
     981</tr>
     982<tr>
     983<td>DS_MIN_RTN_F32</td>
     984<td>8</td>
     985<td>1/4</td>
     986</tr>
     987<tr>
     988<td>DS_MIN_RTN_F64</td>
     989<td>12</td>
     990<td>1/6</td>
     991</tr>
     992<tr>
     993<td>DS_MIN_RTN_I32</td>
     994<td>8</td>
     995<td>1/4</td>
     996</tr>
     997<tr>
     998<td>DS_MIN_RTN_I64</td>
     999<td>12</td>
     1000<td>1/6</td>
     1001</tr>
     1002<tr>
     1003<td>DS_MIN_RTN_U32</td>
     1004<td>8</td>
     1005<td>1/4</td>
     1006</tr>
     1007<tr>
     1008<td>DS_MIN_RTN_U64</td>
     1009<td>12</td>
     1010<td>1/6</td>
     1011</tr>
     1012<tr>
    6561013<td>DS_MIN_SRC2_F32</td>
    6571014<td>4</td>
    658 </tr>
    659 <tr>
    660 <td>DS_ADD_RTN_U64</td>
    661 <td>12</td>
     1015<td>1/4</td>
     1016</tr>
     1017<tr>
    6621018<td>DS_MIN_SRC2_F64</td>
    6631019<td>8</td>
    664 </tr>
    665 <tr>
    666 <td>DS_ADD_SRC2_U32</td>
    667 <td>4</td>
     1020<td>1/8</td>
     1021</tr>
     1022<tr>
    6681023<td>DS_MIN_SRC2_I32</td>
    6691024<td>4</td>
    670 </tr>
    671 <tr>
    672 <td>DS_ADD_SRC2_U64</td>
    673 <td>8</td>
     1025<td>1/4</td>
     1026</tr>
     1027<tr>
    6741028<td>DS_MIN_SRC2_I64</td>
    6751029<td>8</td>
    676 </tr>
    677 <tr>
    678 <td>DS_ADD_U32</td>
    679 <td>8</td>
     1030<td>1/8</td>
     1031</tr>
     1032<tr>
    6801033<td>DS_MIN_SRC2_U32</td>
    6811034<td>4</td>
    682 </tr>
    683 <tr>
    684 <td>DS_ADD_U64</td>
    685 <td>12</td>
     1035<td>1/4</td>
     1036</tr>
     1037<tr>
    6861038<td>DS_MIN_SRC2_U64</td>
    6871039<td>8</td>
    688 </tr>
    689 <tr>
    690 <td>DS_AND_B32</td>
    691 <td>8</td>
     1040<td>1/8</td>
     1041</tr>
     1042<tr>
    6921043<td>DS_MIN_U32</td>
    6931044<td>8</td>
    694 </tr>
    695 <tr>
    696 <td>DS_AND_B64</td>
    697 <td>12</td>
     1045<td>1/4</td>
     1046</tr>
     1047<tr>
    6981048<td>DS_MIN_U64</td>
    6991049<td>12</td>
    700 </tr>
    701 <tr>
    702 <td>DS_AND_RTN_B32</td>
    703 <td>8</td>
     1050<td>1/6</td>
     1051</tr>
     1052<tr>
    7041053<td>DS_MSKOR_B32</td>
    7051054<td>12</td>
    706 </tr>
    707 <tr>
    708 <td>DS_AND_RTN_B64</td>
    709 <td>12</td>
     1055<td>1/6</td>
     1056</tr>
     1057<tr>
    7101058<td>DS_MSKOR_B64</td>
    7111059<td>20</td>
    712 </tr>
    713 <tr>
    714 <td>DS_AND_SRC2_B32</td>
    715 <td>4</td>
     1060<td>1/10</td>
     1061</tr>
     1062<tr>
    7161063<td>DS_MSKOR_RTN_B32</td>
    7171064<td>12</td>
    718 </tr>
    719 <tr>
    720 <td>DS_AND_SRC2_B64</td>
    721 <td>8</td>
     1065<td>1/6</td>
     1066</tr>
     1067<tr>
    7221068<td>DS_MSKOR_RTN_B64</td>
    7231069<td>20</td>
    724 </tr>
    725 <tr>
    726 <td>DS_APPEND</td>
    727 <td>4</td>
     1070<td>1/10</td>
     1071</tr>
     1072<tr>
    7281073<td>DS_NOP</td>
    7291074<td>4</td>
    730 </tr>
    731 <tr>
    732 <td>DS_CMPST_B32</td>
    733 <td>12</td>
     1075<td>?</td>
     1076</tr>
     1077<tr>
    7341078<td>DS_ORDERED_COUNT (???)</td>
    7351079<td>?</td>
    736 </tr>
    737 <tr>
    738 <td>DS_CMPST_B64</td>
    739 <td>20</td>
     1080<td>?</td>
     1081</tr>
     1082<tr>
    7401083<td>DS_OR_B32</td>
    7411084<td>8</td>
    742 </tr>
    743 <tr>
    744 <td>DS_CMPST_F32</td>
    745 <td>12</td>
     1085<td>1/4</td>
     1086</tr>
     1087<tr>
    7461088<td>DS_OR_B64</td>
    7471089<td>12</td>
    748 </tr>
    749 <tr>
    750 <td>DS_CMPST_F64</td>
    751 <td>20</td>
     1090<td>1/6</td>
     1091</tr>
     1092<tr>
    7521093<td>DS_OR_RTN_B32</td>
    7531094<td>8</td>
    754 </tr>
    755 <tr>
    756 <td>DS_CMPST_RTN_B32</td>
    757 <td>12</td>
     1095<td>1/4</td>
     1096</tr>
     1097<tr>
    7581098<td>DS_OR_RTN_B64</td>
    7591099<td>12</td>
    760 </tr>
    761 <tr>
    762 <td>DS_CMPST_RTN_B64</td>
    763 <td>20</td>
     1100<td>1/6</td>
     1101</tr>
     1102<tr>
    7641103<td>DS_OR_SRC2_B32</td>
    7651104<td>4</td>
    766 </tr>
    767 <tr>
    768 <td>DS_CMPST_RTN_F32</td>
    769 <td>12</td>
     1105<td>1/4</td>
     1106</tr>
     1107<tr>
    7701108<td>DS_OR_SRC2_B64</td>
    7711109<td>8</td>
    772 </tr>
    773 <tr>
    774 <td>DS_CMPST_RTN_F64</td>
    775 <td>20</td>
     1110<td>1/8</td>
     1111</tr>
     1112<tr>
    7761113<td>DS_READ2ST64_B32</td>
    7771114<td>8</td>
    778 </tr>
    779 <tr>
    780 <td>DS_CONDXCHG32_RTN_B128</td>
    781 <td>?</td>
     1115<td>1/4</td>
     1116</tr>
     1117<tr>
    7821118<td>DS_READ2ST64_B64</td>
    7831119<td>16</td>
    784 </tr>
    785 <tr>
    786 <td>DS_CONDXCHG32_RTN_B64</td>
    787 <td>?</td>
     1120<td>1/8</td>
     1121</tr>
     1122<tr>
    7881123<td>DS_READ2_B32</td>
    7891124<td>8</td>
    790 </tr>
    791 <tr>
    792 <td>DS_CONSUME</td>
    793 <td>4</td>
     1125<td>1/4</td>
     1126</tr>
     1127<tr>
    7941128<td>DS_READ2_B64</td>
    7951129<td>16</td>
    796 </tr>
    797 <tr>
    798 <td>DS_DEC_RTN_U32</td>
    799 <td>8</td>
     1130<td>1/8</td>
     1131</tr>
     1132<tr>
    8001133<td>DS_READ_B128</td>
    8011134<td>16</td>
    802 </tr>
    803 <tr>
    804 <td>DS_DEC_RTN_U64</td>
    805 <td>12</td>
     1135<td>1/8</td>
     1136</tr>
     1137<tr>
    8061138<td>DS_READ_B32</td>
    8071139<td>4</td>
    808 </tr>
    809 <tr>
    810 <td>DS_DEC_SRC2_U32</td>
    811 <td>4</td>
     1140<td>1/2</td>
     1141</tr>
     1142<tr>
    8121143<td>DS_READ_B64</td>
    8131144<td>8</td>
    814 </tr>
    815 <tr>
    816 <td>DS_DEC_SRC2_U64</td>
    817 <td>8</td>
     1145<td>1/4</td>
     1146</tr>
     1147<tr>
    8181148<td>DS_READ_B96</td>
    8191149<td>16</td>
    820 </tr>
    821 <tr>
    822 <td>DS_DEC_U32</td>
    823 <td>8</td>
     1150<td>1/8</td>
     1151</tr>
     1152<tr>
    8241153<td>DS_READ_I16</td>
    8251154<td>4</td>
    826 </tr>
    827 <tr>
    828 <td>DS_DEC_U64</td>
    829 <td>12</td>
     1155<td>1/2</td>
     1156</tr>
     1157<tr>
    8301158<td>DS_READ_I8</td>
    8311159<td>4</td>
    832 </tr>
    833 <tr>
    834 <td>DS_GWS_BARRIER</td>
    835 <td>?</td>
     1160<td>1/2</td>
     1161</tr>
     1162<tr>
    8361163<td>DS_READ_U16</td>
    8371164<td>4</td>
    838 </tr>
    839 <tr>
    840 <td>DS_GWS_INIT</td>
    841 <td>?</td>
     1165<td>1/2</td>
     1166</tr>
     1167<tr>
    8421168<td>DS_READ_U8</td>
    8431169<td>4</td>
    844 </tr>
    845 <tr>
    846 <td>DS_GWS_SEMA_BR</td>
    847 <td>?</td>
     1170<td>1/2</td>
     1171</tr>
     1172<tr>
    8481173<td>DS_RSUB_RTN_U32</td>
    8491174<td>8</td>
    850 </tr>
    851 <tr>
    852 <td>DS_GWS_SEMA_P</td>
    853 <td>?</td>
     1175<td>1/4</td>
     1176</tr>
     1177<tr>
    8541178<td>DS_RSUB_RTN_U64</td>
    8551179<td>12</td>
    856 </tr>
    857 <tr>
    858 <td>DS_GWS_SEMA_RELEASE_ALL</td>
    859 <td>?</td>
     1180<td>1/6</td>
     1181</tr>
     1182<tr>
    8601183<td>DS_RSUB_SRC2_U32</td>
    8611184<td>4</td>
    862 </tr>
    863 <tr>
    864 <td>DS_GWS_SEMA_V</td>
    865 <td>?</td>
     1185<td>1/4</td>
     1186</tr>
     1187<tr>
    8661188<td>DS_RSUB_SRC2_U64</td>
    8671189<td>8</td>
    868 </tr>
    869 <tr>
    870 <td>DS_INC_RTN_U32</td>
    871 <td>8</td>
     1190<td>1/8</td>
     1191</tr>
     1192<tr>
    8721193<td>DS_RSUB_U32</td>
    8731194<td>8</td>
    874 </tr>
    875 <tr>
    876 <td>DS_INC_RTN_U64</td>
    877 <td>12</td>
     1195<td>1/4</td>
     1196</tr>
     1197<tr>
    8781198<td>DS_RSUB_U64</td>
    8791199<td>12</td>
    880 </tr>
    881 <tr>
    882 <td>DS_INC_SRC2_U32</td>
    883 <td>4</td>
     1200<td>1/6</td>
     1201</tr>
     1202<tr>
    8841203<td>DS_SUB_RTN_U32</td>
    8851204<td>8</td>
    886 </tr>
    887 <tr>
    888 <td>DS_INC_SRC2_U64</td>
    889 <td>8</td>
     1205<td>1/4</td>
     1206</tr>
     1207<tr>
    8901208<td>DS_SUB_RTN_U64</td>
    8911209<td>12</td>
    892 </tr>
    893 <tr>
    894 <td>DS_INC_U32</td>
    895 <td>8</td>
     1210<td>1/6</td>
     1211</tr>
     1212<tr>
    8961213<td>DS_SUB_SRC2_U32</td>
    8971214<td>4</td>
    898 </tr>
    899 <tr>
    900 <td>DS_INC_U64</td>
    901 <td>12</td>
     1215<td>1/4</td>
     1216</tr>
     1217<tr>
    9021218<td>DS_SUB_SRC2_U64</td>
    9031219<td>8</td>
    904 </tr>
    905 <tr>
    906 <td>DS_MAX_F32</td>
    907 <td>8</td>
     1220<td>1/8</td>
     1221</tr>
     1222<tr>
    9081223<td>DS_SUB_U32</td>
    9091224<td>8</td>
    910 </tr>
    911 <tr>
    912 <td>DS_MAX_F64</td>
    913 <td>12</td>
     1225<td>1/4</td>
     1226</tr>
     1227<tr>
    9141228<td>DS_SUB_U64</td>
    9151229<td>12</td>
    916 </tr>
    917 <tr>
    918 <td>DS_MAX_I32</td>
    919 <td>8</td>
     1230<td>1/6</td>
     1231</tr>
     1232<tr>
    9201233<td>DS_SWIZZLE_B32</td>
    9211234<td>4</td>
    922 </tr>
    923 <tr>
    924 <td>DS_MAX_I64</td>
    925 <td>12</td>
     1235<td>1/2</td>
     1236</tr>
     1237<tr>
    9261238<td>DS_WRAP_RTN_B32</td>
    9271239<td>?</td>
    928 </tr>
    929 <tr>
    930 <td>DS_MAX_RTN_F32</td>
    931 <td>8</td>
     1240<td>?</td>
     1241</tr>
     1242<tr>
    9321243<td>DS_WRITE2ST64_B32</td>
    9331244<td>12</td>
    934 </tr>
    935 <tr>
    936 <td>DS_MAX_RTN_F64</td>
    937 <td>12</td>
     1245<td>1/6</td>
     1246</tr>
     1247<tr>
    9381248<td>DS_WRITE2ST64_B64</td>
    9391249<td>20</td>
    940 </tr>
    941 <tr>
    942 <td>DS_MAX_RTN_I32</td>
    943 <td>8</td>
     1250<td>1/10</td>
     1251</tr>
     1252<tr>
    9441253<td>DS_WRITE2_B32</td>
    9451254<td>12</td>
    946 </tr>
    947 <tr>
    948 <td>DS_MAX_RTN_I64</td>
    949 <td>12</td>
     1255<td>1/6</td>
     1256</tr>
     1257<tr>
    9501258<td>DS_WRITE2_B64</td>
    9511259<td>20</td>
    952 </tr>
    953 <tr>
    954 <td>DS_MAX_RTN_U32</td>
    955 <td>8</td>
     1260<td>1/10</td>
     1261</tr>
     1262<tr>
    9561263<td>DS_WRITE_B128</td>
    9571264<td>20</td>
    958 </tr>
    959 <tr>
    960 <td>DS_MAX_RTN_U64</td>
    961 <td>12</td>
     1265<td>1/10</td>
     1266</tr>
     1267<tr>
    9621268<td>DS_WRITE_B16</td>
    9631269<td>8</td>
    964 </tr>
    965 <tr>
    966 <td>DS_MAX_SRC2_F32</td>
    967 <td>4</td>
     1270<td>1/4</td>
     1271</tr>
     1272<tr>
    9681273<td>DS_WRITE_B32</td>
    9691274<td>8</td>
    970 </tr>
    971 <tr>
    972 <td>DS_MAX_SRC2_F64</td>
    973 <td>8</td>
     1275<td>1/4</td>
     1276</tr>
     1277<tr>
    9741278<td>DS_WRITE_B64</td>
    9751279<td>12</td>
    976 </tr>
    977 <tr>
    978 <td>DS_MAX_SRC2_I32</td>
    979 <td>4</td>
     1280<td>1/8</td>
     1281</tr>
     1282<tr>
    9801283<td>DS_WRITE_B8</td>
    9811284<td>8</td>
    982 </tr>
    983 <tr>
    984 <td>DS_MAX_SRC2_I64</td>
    985 <td>8</td>
     1285<td>1/4</td>
     1286</tr>
     1287<tr>
    9861288<td>DS_WRITE_B96</td>
    9871289<td>16</td>
    988 </tr>
    989 <tr>
    990 <td>DS_MAX_SRC2_U32</td>
    991 <td>4</td>
     1290<td>1/10</td>
     1291</tr>
     1292<tr>
    9921293<td>DS_WRITE_SRC2_B32</td>
    9931294<td>12</td>
    994 </tr>
    995 <tr>
    996 <td>DS_MAX_SRC2_U64</td>
    997 <td>8</td>
     1295<td>1/4</td>
     1296</tr>
     1297<tr>
    9981298<td>DS_WRITE_SRC2_B64</td>
    9991299<td>20</td>
    1000 </tr>
    1001 <tr>
    1002 <td>DS_MAX_U32</td>
    1003 <td>8</td>
     1300<td>1/8</td>
     1301</tr>
     1302<tr>
    10041303<td>DS_WRXCHG2ST64_RTN_B32</td>
    10051304<td>12</td>
    1006 </tr>
    1007 <tr>
    1008 <td>DS_MAX_U64</td>
    1009 <td>12</td>
     1305<td>1/6</td>
     1306</tr>
     1307<tr>
    10101308<td>DS_WRXCHG2ST64_RTN_B64</td>
    10111309<td>20</td>
    1012 </tr>
    1013 <tr>
    1014 <td>DS_MIN_F32</td>
    1015 <td>8</td>
     1310<td>1/12</td>
     1311</tr>
     1312<tr>
    10161313<td>DS_WRXCHG2_RTN_B32</td>
    10171314<td>12</td>
    1018 </tr>
    1019 <tr>
    1020 <td>DS_MIN_F64</td>
    1021 <td>12</td>
     1315<td>1/6</td>
     1316</tr>
     1317<tr>
    10221318<td>DS_WRXCHG2_RTN_B64</td>
    10231319<td>20</td>
    1024 </tr>
    1025 <tr>
    1026 <td>DS_MIN_I32</td>
    1027 <td>8</td>
     1320<td>1/12</td>
     1321</tr>
     1322<tr>
    10281323<td>DS_WRXCHG_RTN_B32</td>
    10291324<td>8</td>
    1030 </tr>
    1031 <tr>
    1032 <td>DS_MIN_I64</td>
    1033 <td>12</td>
     1325<td>1/4</td>
     1326</tr>
     1327<tr>
    10341328<td>DS_WRXCHG_RTN_B64</td>
    10351329<td>12</td>
    1036 </tr>
    1037 <tr>
    1038 <td>DS_MIN_RTN_F32</td>
    1039 <td>8</td>
     1330<td>1/6</td>
     1331</tr>
     1332<tr>
    10401333<td>DS_XOR_B32</td>
    10411334<td>8</td>
    1042 </tr>
    1043 <tr>
    1044 <td>DS_MIN_RTN_F64</td>
    1045 <td>12</td>
     1335<td>1/4</td>
     1336</tr>
     1337<tr>
    10461338<td>DS_XOR_B64</td>
    10471339<td>12</td>
    1048 </tr>
    1049 <tr>
    1050 <td>DS_MIN_RTN_I32</td>
    1051 <td>8</td>
     1340<td>1/6</td>
     1341</tr>
     1342<tr>
    10521343<td>DS_XOR_RTN_B32</td>
    10531344<td>8</td>
    1054 </tr>
    1055 <tr>
    1056 <td>DS_MIN_RTN_I64</td>
    1057 <td>12</td>
     1345<td>1/4</td>
     1346</tr>
     1347<tr>
    10581348<td>DS_XOR_RTN_B64</td>
    10591349<td>12</td>
    1060 </tr>
    1061 <tr>
    1062 <td>DS_MIN_RTN_U32</td>
    1063 <td>8</td>
     1350<td>1/6</td>
     1351</tr>
     1352<tr>
    10641353<td>DS_XOR_SRC2_B32</td>
    10651354<td>4</td>
    1066 </tr>
    1067 <tr>
    1068 <td>DS_MIN_RTN_U64</td>
    1069 <td>12</td>
     1355<td>1/4</td>
     1356</tr>
     1357<tr>
    10701358<td>DS_XOR_SRC2_B64</td>
    10711359<td>8</td>
     1360<td>1/8</td>
    10721361</tr>
    10731362</tbody>