Changes between Version 18 and Version 19 of GcnTimings
- Timestamp:
- 06/05/16 20:00:50 (8 years ago)
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GcnTimings
v18 v19 157 157 <h3>Instruction scheduling</h3> 158 158 <ul> 159 <li>if many wavefront executed in single CU (if many wavefronts) then scalar, vector and 160 data-share, memory (???) execution units can run independently (parallely) way, 161 achieving many instructions per cycles.</li> 159 162 <li>between any integer V_ADD*, V_SUB*, V_FIRSTREADLINE_B32, V_READLANE_B32 operation 160 163 and any scalar ALU instruction is 16-cycle delay. Masked if more waves than 4*CUs</li> … … 650 653 <h3>DS Instruction timings</h3> 651 654 <p>Timings of DS instructions includes only execution without waiting for completing 652 LDS/GDS memory access on single wavefront. Timings of DS instructions are in this table:</p> 655 LDS/GDS memory access on single wavefront. Throughput indicates maximal possible 656 throughput that excludes any other delays and penalties. 657 Timings of DS instructions are in this table:</p> 653 658 <table> 654 659 <thead>