| 226 | <h4>V_PK_ADD_F16</h4> |
| 227 | <p>Opcode: 15 (0xf)<br /> |
| 228 | Syntax: V_PK_ADD_F16 VDST, SRC0, SRC1<br /> |
| 229 | Description: Add two 16-bit FP values from SRC0 to |
| 230 | 16-bit FP values from SRC1, and store result to VDST.<br /> |
| 231 | Operation:<br /> |
| 232 | <code>HALF S0_0 = ASHALF(SRC0&0xffff), S0_1 = ASHALF(SRC0>>16) |
| 233 | HALF S1_0 = ASHALF(SRC1&0xffff), S1_1 = ASHALF(SRC1>>16) |
| 234 | HALF temp0 = S0_0 + S1_0 |
| 235 | HALF temp1 = S0_1 + S1_1 |
| 236 | VDST = ASINT16(temp0) | (ASINT16(temp1)<<16)</code></p> |
| 271 | <h4>V_PK_FMA_F16</h4> |
| 272 | <p>Opcode: 14 (0xe)<br /> |
| 273 | Syntax: V_PK_FMA_F16 VDST, SRC0, SRC1, SRC2<br /> |
| 274 | Description: Two fused multiplies-adds on two 16-bit FP values from SRC0, SRC1 and SRC2 |
| 275 | and store result to VDST.<br /> |
| 276 | Operation:<br /> |
| 277 | <code>HALF S0_0 = ASHALF(SRC0&0xffff), S0_1 = ASHALF(SRC0>>16) |
| 278 | HALF S1_0 = ASHALF(SRC1&0xffff), S1_1 = ASHALF(SRC1>>16) |
| 279 | HALF S2_0 = ASHALF(SRC2&0xffff), S2_1 = ASHALF(SRC2>>16) |
| 280 | HALF temp0 = FMA(S0_0, S1_0, S2_0) |
| 281 | HALF temp1 = FMA(S0_1, S1_1, S2_1) |
| 282 | VDST = ASINT16(temp0) | (ASINT16(temp1)<<16)</code></p> |
| 351 | <h4>V_PK_MAX_F16</h4> |
| 352 | <p>Opcode: 18 (0x12)<br /> |
| 353 | Syntax: V_PK_MAX_F16 VDST, SRC0, SRC1<br /> |
| 354 | Description: Choose greatest 16-bit floating point values between values from SRC0 and SRC1, |
| 355 | and store result to VDST.<br /> |
| 356 | Operation:<br /> |
| 357 | <code>HALF S0_0 = ASHALF(SRC0&0xffff), S0_1 = ASHALF(SRC0>>16) |
| 358 | HALF S1_0 = ASHALF(SRC1&0xffff), S1_1 = ASHALF(SRC1>>16) |
| 359 | HALF temp0 = MAX(S0_0, S1_0) |
| 360 | HALF temp1 = MAX(S0_1, S1_1) |
| 361 | VDST = ASINT16(temp0) | (ASINT16(temp1)<<16)</code></p> |
| 384 | <h4>V_PK_MIN_F16</h4> |
| 385 | <p>Opcode: 17 (0x11)<br /> |
| 386 | Syntax: V_PK_MIN_F16 VDST, SRC0, SRC1<br /> |
| 387 | Description: Choose smallest 16-bit floating point values between values from SRC0 and SRC1, |
| 388 | and store result to VDST.<br /> |
| 389 | Operation:<br /> |
| 390 | <code>HALF S0_0 = ASHALF(SRC0&0xffff), S0_1 = ASHALF(SRC0>>16) |
| 391 | HALF S1_0 = ASHALF(SRC1&0xffff), S1_1 = ASHALF(SRC1>>16) |
| 392 | HALF temp0 = MIN(S0_0, S1_0) |
| 393 | HALF temp1 = MIN(S0_1, S1_1) |
| 394 | VDST = ASINT16(temp0) | (ASINT16(temp1)<<16)</code></p> |
| 417 | <h4>V_PK_MUL_F16</h4> |
| 418 | <p>Opcode: 16 (0x10)<br /> |
| 419 | Syntax: V_PK_MUL_F16 VDST, SRC0, SRC1<br /> |
| 420 | Description: Multiply two 16-bit FP values from SRC0 by |
| 421 | 16-bit FP values from SRC1, and store result to VDST.<br /> |
| 422 | Operation:<br /> |
| 423 | <code>HALF S0_0 = ASHALF(SRC0&0xffff), S0_1 = ASHALF(SRC0>>16) |
| 424 | HALF S1_0 = ASHALF(SRC1&0xffff), S1_1 = ASHALF(SRC1>>16) |
| 425 | HALF temp0 = S0_0 * S1_0 |
| 426 | HALF temp1 = S0_1 * S1_1 |
| 427 | VDST = ASINT16(temp0) | (ASINT16(temp1)<<16)</code></p> |