Changes between Version 9 and Version 10 of GcnTimings

Timestamp:

05/27/16 07:00:22 (8 years ago)

Author:

trac

Comment:

--

GcnTimings

@@ -118 +118 @@
 (N-3, where N is number of dword).</li>
 </ul>
-<p>IMPORTANT: If occupancy is greater than 1 wave per compute unit, then penalties for
-instruction fetching, branches, and scalar instructions will be masked while executing
+<p>IMPORTANT: If occupancy is greater than 1 wave per compute unit, then penalties,
+branches, and scalar instructions will be masked while executing
 more waves than 4*CUs. For best results is recommended to execute many waves
 (multiple of 4*CUs) with occupancy greater than 1.</p>
@@ -125 +125 @@
 <ul>
 <li>between any integer V_ADD*, V_SUB*, V_FIRSTREADLINE_B32, V_READLANE_B32 operation
-and any scalar ALU instruction is 16-cycle delay.</li>
+and any scalar ALU instruction is 16-cycle delay. Masked if more waves than 4*CUs</li>
 <li>any conditional jump directly that checks VCCZ or EXECZ after instruction that changes
-VCC or EXEC adds single penalty (4 cycles)</li>
+VCC or EXEC adds single penalty (4 cycles). Masked if more waves than 4*CUs</li>
 <li>any conditional jump directly that checks SCC after instruction that changes SCC,
-EXEC, VCC adds single penalty (4 cycles)</li>
+EXEC, VCC adds single penalty (4 cycles). Masked if more waves than 4*CUs</li>
 </ul>
 <h3>SOP2 Instruction timings</h3>