Changes between Version 14 and Version 15 of GcnTimings


Ignore:
Timestamp:
05/30/16 18:00:38 (8 years ago)
Author:
trac
Comment:

--

Legend:

Unmodified
Added
Removed
Modified

  • GcnTimings

    v14 v15  
    638638</tbody>
    639639</table>
     640<h1>DS Instruction timings</h1>
     641<p>Timings of DS instructions includes only execution without waiting for completing
     642LDS/GDS memory access on single wavefront. Timings of DS instructions are in this table:</p>
     643<table>
     644<thead>
     645<tr>
     646<th>Instruction</th>
     647<th>Cycles</th>
     648<th>Instruction</th>
     649<th>Cycles</th>
     650</tr>
     651</thead>
     652<tbody>
     653<tr>
     654<td>DS_ADD_RTN_U32</td>
     655<td>8</td>
     656<td>DS_MIN_SRC2_F32</td>
     657<td>4</td>
     658</tr>
     659<tr>
     660<td>DS_ADD_RTN_U64</td>
     661<td>12</td>
     662<td>DS_MIN_SRC2_F64</td>
     663<td>8</td>
     664</tr>
     665<tr>
     666<td>DS_ADD_SRC2_U32</td>
     667<td>4</td>
     668<td>DS_MIN_SRC2_I32</td>
     669<td>4</td>
     670</tr>
     671<tr>
     672<td>DS_ADD_SRC2_U64</td>
     673<td>8</td>
     674<td>DS_MIN_SRC2_I64</td>
     675<td>8</td>
     676</tr>
     677<tr>
     678<td>DS_ADD_U32</td>
     679<td>8</td>
     680<td>DS_MIN_SRC2_U32</td>
     681<td>4</td>
     682</tr>
     683<tr>
     684<td>DS_ADD_U64</td>
     685<td>12</td>
     686<td>DS_MIN_SRC2_U64</td>
     687<td>8</td>
     688</tr>
     689<tr>
     690<td>DS_AND_B32</td>
     691<td>8</td>
     692<td>DS_MIN_U32</td>
     693<td>8</td>
     694</tr>
     695<tr>
     696<td>DS_AND_B64</td>
     697<td>12</td>
     698<td>DS_MIN_U64</td>
     699<td>12</td>
     700</tr>
     701<tr>
     702<td>DS_AND_RTN_B32</td>
     703<td>8</td>
     704<td>DS_MSKOR_B32</td>
     705<td>12</td>
     706</tr>
     707<tr>
     708<td>DS_AND_RTN_B64</td>
     709<td>12</td>
     710<td>DS_MSKOR_B64</td>
     711<td>20</td>
     712</tr>
     713<tr>
     714<td>DS_AND_SRC2_B32</td>
     715<td>4</td>
     716<td>DS_MSKOR_RTN_B32</td>
     717<td>12</td>
     718</tr>
     719<tr>
     720<td>DS_AND_SRC2_B64</td>
     721<td>8</td>
     722<td>DS_MSKOR_RTN_B64</td>
     723<td>20</td>
     724</tr>
     725<tr>
     726<td>DS_APPEND</td>
     727<td>4</td>
     728<td>DS_NOP</td>
     729<td>4</td>
     730</tr>
     731<tr>
     732<td>DS_CMPST_B32</td>
     733<td>12</td>
     734<td>DS_ORDERED_COUNT (???)</td>
     735<td>?</td>
     736</tr>
     737<tr>
     738<td>DS_CMPST_B64</td>
     739<td>20</td>
     740<td>DS_OR_B32</td>
     741<td>8</td>
     742</tr>
     743<tr>
     744<td>DS_CMPST_F32</td>
     745<td>12</td>
     746<td>DS_OR_B64</td>
     747<td>12</td>
     748</tr>
     749<tr>
     750<td>DS_CMPST_F64</td>
     751<td>20</td>
     752<td>DS_OR_RTN_B32</td>
     753<td>8</td>
     754</tr>
     755<tr>
     756<td>DS_CMPST_RTN_B32</td>
     757<td>12</td>
     758<td>DS_OR_RTN_B64</td>
     759<td>12</td>
     760</tr>
     761<tr>
     762<td>DS_CMPST_RTN_B64</td>
     763<td>20</td>
     764<td>DS_OR_SRC2_B32</td>
     765<td>4</td>
     766</tr>
     767<tr>
     768<td>DS_CMPST_RTN_F32</td>
     769<td>12</td>
     770<td>DS_OR_SRC2_B64</td>
     771<td>8</td>
     772</tr>
     773<tr>
     774<td>DS_CMPST_RTN_F64</td>
     775<td>20</td>
     776<td>DS_READ2ST64_B32</td>
     777<td>8</td>
     778</tr>
     779<tr>
     780<td>DS_CONDXCHG32_RTN_B128</td>
     781<td>?</td>
     782<td>DS_READ2ST64_B64</td>
     783<td>16</td>
     784</tr>
     785<tr>
     786<td>DS_CONDXCHG32_RTN_B64</td>
     787<td>?</td>
     788<td>DS_READ2_B32</td>
     789<td>8</td>
     790</tr>
     791<tr>
     792<td>DS_CONSUME</td>
     793<td>4</td>
     794<td>DS_READ2_B64</td>
     795<td>16</td>
     796</tr>
     797<tr>
     798<td>DS_DEC_RTN_U32</td>
     799<td>8</td>
     800<td>DS_READ_B128</td>
     801<td>16</td>
     802</tr>
     803<tr>
     804<td>DS_DEC_RTN_U64</td>
     805<td>12</td>
     806<td>DS_READ_B32</td>
     807<td>4</td>
     808</tr>
     809<tr>
     810<td>DS_DEC_SRC2_U32</td>
     811<td>4</td>
     812<td>DS_READ_B64</td>
     813<td>8</td>
     814</tr>
     815<tr>
     816<td>DS_DEC_SRC2_U64</td>
     817<td>8</td>
     818<td>DS_READ_B96</td>
     819<td>16</td>
     820</tr>
     821<tr>
     822<td>DS_DEC_U32</td>
     823<td>8</td>
     824<td>DS_READ_I16</td>
     825<td>4</td>
     826</tr>
     827<tr>
     828<td>DS_DEC_U64</td>
     829<td>12</td>
     830<td>DS_READ_I8</td>
     831<td>4</td>
     832</tr>
     833<tr>
     834<td>DS_GWS_BARRIER</td>
     835<td>?</td>
     836<td>DS_READ_U16</td>
     837<td>4</td>
     838</tr>
     839<tr>
     840<td>DS_GWS_INIT</td>
     841<td>?</td>
     842<td>DS_READ_U8</td>
     843<td>4</td>
     844</tr>
     845<tr>
     846<td>DS_GWS_SEMA_BR</td>
     847<td>?</td>
     848<td>DS_RSUB_RTN_U32</td>
     849<td>8</td>
     850</tr>
     851<tr>
     852<td>DS_GWS_SEMA_P</td>
     853<td>?</td>
     854<td>DS_RSUB_RTN_U64</td>
     855<td>12</td>
     856</tr>
     857<tr>
     858<td>DS_GWS_SEMA_RELEASE_ALL</td>
     859<td>?</td>
     860<td>DS_RSUB_SRC2_U32</td>
     861<td>4</td>
     862</tr>
     863<tr>
     864<td>DS_GWS_SEMA_V</td>
     865<td>?</td>
     866<td>DS_RSUB_SRC2_U64</td>
     867<td>8</td>
     868</tr>
     869<tr>
     870<td>DS_INC_RTN_U32</td>
     871<td>8</td>
     872<td>DS_RSUB_U32</td>
     873<td>8</td>
     874</tr>
     875<tr>
     876<td>DS_INC_RTN_U64</td>
     877<td>12</td>
     878<td>DS_RSUB_U64</td>
     879<td>12</td>
     880</tr>
     881<tr>
     882<td>DS_INC_SRC2_U32</td>
     883<td>4</td>
     884<td>DS_SUB_RTN_U32</td>
     885<td>8</td>
     886</tr>
     887<tr>
     888<td>DS_INC_SRC2_U64</td>
     889<td>8</td>
     890<td>DS_SUB_RTN_U64</td>
     891<td>12</td>
     892</tr>
     893<tr>
     894<td>DS_INC_U32</td>
     895<td>8</td>
     896<td>DS_SUB_SRC2_U32</td>
     897<td>4</td>
     898</tr>
     899<tr>
     900<td>DS_INC_U64</td>
     901<td>12</td>
     902<td>DS_SUB_SRC2_U64</td>
     903<td>8</td>
     904</tr>
     905<tr>
     906<td>DS_MAX_F32</td>
     907<td>8</td>
     908<td>DS_SUB_U32</td>
     909<td>8</td>
     910</tr>
     911<tr>
     912<td>DS_MAX_F64</td>
     913<td>12</td>
     914<td>DS_SUB_U64</td>
     915<td>12</td>
     916</tr>
     917<tr>
     918<td>DS_MAX_I32</td>
     919<td>8</td>
     920<td>DS_SWIZZLE_B32</td>
     921<td>4</td>
     922</tr>
     923<tr>
     924<td>DS_MAX_I64</td>
     925<td>12</td>
     926<td>DS_WRAP_RTN_B32</td>
     927<td>?</td>
     928</tr>
     929<tr>
     930<td>DS_MAX_RTN_F32</td>
     931<td>8</td>
     932<td>DS_WRITE2ST64_B32</td>
     933<td>12</td>
     934</tr>
     935<tr>
     936<td>DS_MAX_RTN_F64</td>
     937<td>12</td>
     938<td>DS_WRITE2ST64_B64</td>
     939<td>20</td>
     940</tr>
     941<tr>
     942<td>DS_MAX_RTN_I32</td>
     943<td>8</td>
     944<td>DS_WRITE2_B32</td>
     945<td>12</td>
     946</tr>
     947<tr>
     948<td>DS_MAX_RTN_I64</td>
     949<td>12</td>
     950<td>DS_WRITE2_B64</td>
     951<td>20</td>
     952</tr>
     953<tr>
     954<td>DS_MAX_RTN_U32</td>
     955<td>8</td>
     956<td>DS_WRITE_B128</td>
     957<td>20</td>
     958</tr>
     959<tr>
     960<td>DS_MAX_RTN_U64</td>
     961<td>12</td>
     962<td>DS_WRITE_B16</td>
     963<td>8</td>
     964</tr>
     965<tr>
     966<td>DS_MAX_SRC2_F32</td>
     967<td>4</td>
     968<td>DS_WRITE_B32</td>
     969<td>8</td>
     970</tr>
     971<tr>
     972<td>DS_MAX_SRC2_F64</td>
     973<td>8</td>
     974<td>DS_WRITE_B64</td>
     975<td>12</td>
     976</tr>
     977<tr>
     978<td>DS_MAX_SRC2_I32</td>
     979<td>4</td>
     980<td>DS_WRITE_B8</td>
     981<td>8</td>
     982</tr>
     983<tr>
     984<td>DS_MAX_SRC2_I64</td>
     985<td>8</td>
     986<td>DS_WRITE_B96</td>
     987<td>16</td>
     988</tr>
     989<tr>
     990<td>DS_MAX_SRC2_U32</td>
     991<td>4</td>
     992<td>DS_WRITE_SRC2_B32</td>
     993<td>12</td>
     994</tr>
     995<tr>
     996<td>DS_MAX_SRC2_U64</td>
     997<td>8</td>
     998<td>DS_WRITE_SRC2_B64</td>
     999<td>20</td>
     1000</tr>
     1001<tr>
     1002<td>DS_MAX_U32</td>
     1003<td>8</td>
     1004<td>DS_WRXCHG2ST64_RTN_B32</td>
     1005<td>12</td>
     1006</tr>
     1007<tr>
     1008<td>DS_MAX_U64</td>
     1009<td>12</td>
     1010<td>DS_WRXCHG2ST64_RTN_B64</td>
     1011<td>20</td>
     1012</tr>
     1013<tr>
     1014<td>DS_MIN_F32</td>
     1015<td>8</td>
     1016<td>DS_WRXCHG2_RTN_B32</td>
     1017<td>12</td>
     1018</tr>
     1019<tr>
     1020<td>DS_MIN_F64</td>
     1021<td>12</td>
     1022<td>DS_WRXCHG2_RTN_B64</td>
     1023<td>20</td>
     1024</tr>
     1025<tr>
     1026<td>DS_MIN_I32</td>
     1027<td>8</td>
     1028<td>DS_WRXCHG_RTN_B32</td>
     1029<td>8</td>
     1030</tr>
     1031<tr>
     1032<td>DS_MIN_I64</td>
     1033<td>12</td>
     1034<td>DS_WRXCHG_RTN_B64</td>
     1035<td>12</td>
     1036</tr>
     1037<tr>
     1038<td>DS_MIN_RTN_F32</td>
     1039<td>8</td>
     1040<td>DS_XOR_B32</td>
     1041<td>8</td>
     1042</tr>
     1043<tr>
     1044<td>DS_MIN_RTN_F64</td>
     1045<td>12</td>
     1046<td>DS_XOR_B64</td>
     1047<td>12</td>
     1048</tr>
     1049<tr>
     1050<td>DS_MIN_RTN_I32</td>
     1051<td>8</td>
     1052<td>DS_XOR_RTN_B32</td>
     1053<td>8</td>
     1054</tr>
     1055<tr>
     1056<td>DS_MIN_RTN_I64</td>
     1057<td>12</td>
     1058<td>DS_XOR_RTN_B64</td>
     1059<td>12</td>
     1060</tr>
     1061<tr>
     1062<td>DS_MIN_RTN_U32</td>
     1063<td>8</td>
     1064<td>DS_XOR_SRC2_B32</td>
     1065<td>4</td>
     1066</tr>
     1067<tr>
     1068<td>DS_MIN_RTN_U64</td>
     1069<td>12</td>
     1070<td>DS_XOR_SRC2_B64</td>
     1071<td>8</td>
     1072</tr>
     1073</tbody>
     1074</table>
    6401075}}}